[plug] ia64 linux = P4? & general Q re speed and if anyone has tried it

[Ben Jensz]

As far as I've read, the current Intel processors are CISC based.  But I
read somewhere a while back that the SECC PIIs were a CISC shell surrounding
a RISC engine internally?  I don't know whether that applies to the SECC
PIIIs as well or even the FC-PGA PIIIs or the P4 for that matter.. But what
that means when its at home is beyond me... :P


/ Ben

----- Original Message -----
From: "Mike" <erazmus at iinet.net.au>
To: <plug at plug.linux.org.au>
Sent: Friday, October 05, 2001 1:10 PM
Subject: Re: [plug] ia64 linux = P4? & general Q re speed and if anyone has
tried it


> At 09:24 AM 5/10/2001 +0800, you wrote:
> >"Reduced instruction set" doesn't necessarily have to refer to the
> >instruction set it reads in from RAM. If the core of the processor is
> >running RISC microcode, then the CISC instructions it is translating
don't
> >stop the core from being RISC. What is the instruction set of a Pentium
> >running a JVM?
>
> >Also remember that RISC denotes a set of reduced instructions, not a
> >reduced set of instructions. The number of instructions is not relevant.
>
> mmmm.... (not completely convinced)
>
> The way I understand it is, as the processor deals with complex
> multibyte instructions without any particular need for off chip
> ordering then the 'chip' is classed as a Complex Instruction Set
> Computer (ie CISC device).
>
> The fact the CISC instructions are translated on chip to microcode
> which may have RISC like features doesn't make the overall chip
> a RISC device - but a 'part' of the core might well operate like
> a RISC engine. Also any on chip instruction reording when CISC is
> translated to other instructions is performed by h/w, overall this
> makes the chip very very complex indeed... Not in the general class
> of a true RISC device which is often seen as:- Minimal silicon,
> no complex pipelining, instruction ordering handled off chip etc...
>
> Overall I am still of the opinion that the P? series of processors
> are CISC devices...
>
> Rgds
>
> Mike
>
>